When we introduced this product several years ago, our goal was to reduce or even eliminate the manual assembly of complex chips. Making hundreds of thousands of inter-block connections by hand is tedious and error-prone. It wastes precious human resources that could be better engaged in innovative design. Debugging the inevitable typos and other errors in manual interconnection takes... https://www.agnisys.com/blog/intelligently-assembling-socs-the-agnisys-way/